From 3d9d7c7ef6139fd3455dfa34cc5ed9695c16b59e Mon Sep 17 00:00:00 2001 From: Anton Kirilov Date: Wed, 20 Aug 2025 20:15:37 +0100 Subject: [PATCH] unix: improve uv__cpu_relax() on arm (#4863) The AArch64 YIELD instruction affects processors that support symmetric multithreading, while on other implementations (which are the majority on the market) it is equivalent to NOP, thus failing to achieve the desired delay effect inside uv__async_spin(). Instead, use the ISB instruction, following one of Arm's recommendations [1]. [1] https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/multi-threaded-applications-arm Signed-off-by: Anton Kirilov --- src/unix/async.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/unix/async.c b/src/unix/async.c index 538ae7876..9e4e113a7 100644 --- a/src/unix/async.c +++ b/src/unix/async.c @@ -409,7 +409,7 @@ static void uv__cpu_relax(void) { #if defined(__i386__) || defined(__x86_64__) __asm__ __volatile__ ("rep; nop" ::: "memory"); /* a.k.a. PAUSE */ #elif (defined(__arm__) && __ARM_ARCH >= 7) || defined(__aarch64__) - __asm__ __volatile__ ("yield" ::: "memory"); + __asm__ __volatile__ ("isb" ::: "memory"); #elif (defined(__ppc__) || defined(__ppc64__)) && defined(__APPLE__) __asm volatile ("" : : : "memory"); #elif !defined(__APPLE__) && (defined(__powerpc64__) || defined(__ppc64__) || defined(__PPC64__))